1. Field of the Invention
The present invention relates to a fabrication method of a dielectric layer for a Dynamic Random Access Memory (DRAM) capacitor. More particularly, the present invention relates to a fabrication method for a tantalum pentoxide (Ta.sub.2 O.sub.5) dielectric film layer.
2. Description of the Related Art
A single transistor DRAM cell is, in general, formed with a metal oxide semiconductor (MOS) transistor and a capacitor. The capacitor is the signal storage center for a DRAM cell, in which 1 bit of data is stored by a charge stored therein. As the amount of charge being stored by the capacitor is increased, the effect of noise on a reading amplifier in the information reading is greatly reduced. The "refresh" frequency is also further reduced. Increasing the charge storage capacity of a capacitor is generally accomplished by the following methods. Increasing the area of the capacitor increases the amount of charge capable of being stored by the capacitor; however, such an increase also lowers the integration of a DRAM device. Reducing the thickness of the dielectric layer also increases the capacitance of the capacitor. The material properties of the dielectric layer and the current manufacturing technique, however, require a minimum thickness of the dielectric layer. Substituting a high dielectric constant material for the dielectric layer is another approach to increasing the charge storage capacity per unit area of the capacitor.
The dielectric constant of tantalum pentoxide is approximately as high as 25, tantalum pentoxide is thereby gradually replacing oxide-nitride-oxide (ONO) as the dielectric film layer. The tantalum pentoxide dielectric film layer is conventionally deposited by chemical vapor deposition. Such a tantalum pentoxide dielectric film layer, however, poses a serious problem of charge loss, which then requires a thermal treatment in an oxygen atmosphere at a temperature of 750 to 800.degree. C. During the thermal treatment, silicon oxide is, however, formed at the interface of the tantalum pentoxide film layer and the polysilicon storage electrode, which reduces the dielectric constant of the dielectric layer for the entire capacitor. As a result, a tantalum pentoxide dielectric film layer using the current manufacturing method cannot reach a dielectric constant of 25.
A conventional approach in resolving the above problem is to conduct a nitride reaction on the finished polysilicon storage electrode surface, followed by a deposition of tantalum pentoxide. A thermal treatment in an oxygen atmosphere further improves the quality of the tantalum pentoxide. Although silicon nitride (SiN) or silicon nitric oxide (SiON) is already formed on the surface of the polysilicon storage electrode after the nitride reaction, silicon oxide is still formed at the interface of the polysilicon storage electrode and the tantalum pentoxide layer.
Another approach to mitigate the above problem in the conventional practice is to deposit tantalum pentoxide on the polysilicon storage electrode, followed by conducting a two-step treatment on the tantalum pentoxide. First, an ultraviolet light-ozone treatment (UV-O.sub.3) is conducted at a temperature of 300 to 450.degree. C. to remove the carbon impurities in the tantalum pentoxide. The UV-O.sub.3 treatment also prevents the formation of silicon oxide on the polysilicon storage electrode surface. After which, a thermal treatment is conducted at an even higher temperature of 700 to 800.degree. C. to convert tantalum pentoxide from a non-crystalline state to a crystalline state in order to improve the current leakage problem. During this treatment step, however, the formation of silicon oxide on the polysilicon storage electrode surface is still inevitable.